Abstract—The FFT, Fast Fourier Transform is the most
ubiquitous algorithm used for signal analysis in present-day
communication systems (Example: OFDM). The general
principle of FFT Algorithms is to use a Divide and Conquer
approach that effectively reduces operation count. The FFT is
generally computed either using a single radix or by mixed
radix algorithms. Several optimization techniques have been
proposed to increase efficiency while computing the Fourier
Transform. This paper develops a reconfigurable FFT
processor that can take any number of points as input, and is
not limited to sequence lengths that are powers of the radix. The
paper compares the factorized mixed radix approach with the
single radix approach for computation of the FFT of a truly
N-point sequence and shows that the mixed-radix approach
yields better performance results. The test designs were
developed in VHDL, verified in Matlab and Modelsim, and
implemented using Xilinx Virtex5 LX110T FPGA.
Index Terms—Fast fourier transform, mixed radix,
cooley-Tukey algorithm, prime-factor algorithm, word length
effects.
The authors are with Department of Electronics and Communication
Engineering Amrita Vishwa Vidyapeetham, India (e-mail:
ramesh.amrita@gmail.com).
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Cite: Ramesh Bhakthavatchalu, Meera Viswanath, Pallavi Venugopal M., and Anju R., "Programmable N-Point FFT Design," Lecture Notes on Software Engineering vol. 2, no. 3, pp. 247-250, 2014.